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Semiconductor Fab - With breakthrough, India inches close to dust-layered Dream!

THE POLICY LAB (TPL-10)
SEPTEMBER 19, 2022

By J B Mohapatra

IN the context of less than anticipated momentum in developing a semiconductor eco-system in China, Jonathan Woetzel in 2019 wrote as follows: "China's relative progress is not surprising. In this sector, the technology barrier is extremely high. No one country has fully indigenized and achieved self-sufficiency in its semiconductor value chain. Compared with LCD, whose manufacturing process has about 11 process steps, semiconductor manufacturing has up to 1,200 process steps over a six-to-eight-week cycle. Furthermore, as manufacturing advances, the complexity of the process, and therefore the investment need increases exponentially. This makes it even more difficult and expensive for lagging players to catch up. For example, it takes about 500 steps to create a 20nm chip in a foundry environment but about 1,500 steps for a 7 nm chip. Similarly setting up a 1K wafer capacity would cost USD 500 million based on a 32nm technology, but a USD 2 billion using 7nm technology."

It is undeniable that both aspects - complexity in achieving technology and engineering precision, and scale of investment - have kept semiconductor industry confined only to few jurisdictions where either a conducive ecosystem exists or there is a conscious and consistent government support as is the case with Korea, Singapore or Taiwan. So much is the significance of semiconductors in modern economic life of a nation that USA who had its semiconductor manufacturing capacity eroded from 37% in the 90's to 12% was pressured to passing of a federal Act - Creating Helpful Incentives to Produce Semiconductors or the CHIPS Act in 2022 - to strengthen domestic manufacturing, design and research, fortify the economy and national security and bring USA to the fore of significant supply chain for chips and wafers.

In India, against a rapidly growing electronics market (USD120 billion in 2020 and expected to rise to USD 400 billion (27% CAGR) in next 5 years, India's electronics import in 2019 was approximately USD 55 billion with a 15% CAGR, and approximately USD 60 billion worth of semiconductor content and USD 18 billion worth of semiconductor foundry/ factory value in all electronic products turned out domestically, and where India consumes 15% of all world production of semiconductors, it has been stated that the world would need at least 28 new semiconductor fabrication facilities in next 5 years to satiate India's requirements alone. For India, rising costs of electronic imports, which ranks a touch below the oil imports, due to add-on expenses associated with transportation, inventory, warehousing and logistics is as much worrying as dangers and uncertainties around predatory pricing and dangers of access denial, which can be leveraged in critical moments by adversarial interests.

While assessing challenges and opportunities in semiconductors, a McKinsey study entitled ‘India's Turning Point: An Economic Agenda to Spur Growth and Jobs', a commonly known finding that electronics and semiconductors are critical to GDP growth has been more explicitly analyzed. Firstly, this report states that competitive manufacturing hubs in hi-tech and capital goods, chemicals, auto components, EV and medical devices are anchored primarily in country's depth and manufacturing expertise in electronics and semiconductors. Second, digital services led GDP growth from automation, connectivity, e-finance and e-governance are ultimately anchored on electronics hardware platforms. Without proven expertise and depth in setting up on scale semiconductor fabrication facilities, critical value creation goals set up through ambitious schemes and programs will not successfully materialize.

It is in that specific context that National Policy on Electronics, 2019 included in its scope and vision for promotion of domestic manufacturing and export in the entire value chain of ESDM for economic development to achieve a turnover of USD 400 billion by 2025 the following: (a) to provide incentives and support for manufacturing core electronic components (b) special package of incentives for mega projects which are extremely hi-tech and entail huge investments such as semiconductor fabrication facilities, display fabrication (c) promote industry led R&D and innovation in all sub-sectors of electronics including 5G, IOT, sensors, artificial intelligence, massive learning, virtual reality, drones, robotics, additive manufacturing, photonics, nano-based devices (d) provide incentives and support for significantly enhancing availability of skilled manpower including fabless, chip design, medical electronics and strategic electronics sectors (e) create sovereign patent fund to promote development and acquisition of IP in ESDM sector (f) promote trusted electronic value chain initiatives.

Within the matrix of value chain necessities for a fabrication facility falling within the 4 pillars - product design, IC design, fabrication, and equipment and materials - for turning a silicon wafer to a product, fab is the convergence point where materials, metal targets, wafers, chemicals and bulk gases through wafer processing tools, lithographic tools, plasma processing for deposition and etch are employed for manufacturing silicon wafers, which then are packaged through a process known as outsourced sort assembly and test (OSAT). These packages are mounted on PCBs and PCBs are assembled in to products with mechanical components and display through another process commonly known as electronics manufacturing services (EMS). Semiconductor fabrication is the most crucial point in the supply chain for an electronics sector.

It is not that there was a dearth of attempts to push for a semiconductor fab facility in India. Cabinet on 12-9-13 had in fact accorded an in-principle approval for setting up two semiconductor wafer fab manufacturing facilities and constituted an empowered committee (EC) to identify and issue LOIs to the most deserving. EC issued LOI to 2 consortia on 19-3-14. One was the proposal of Jaiprakash Associates with IBM (USA) and Tower Jazz (Israel) with an outlay of Rs 26,300 crores for establishing the fab facility of 40,000 wafer starts per month of 300 nm size at Greater Noida using advanced CMOS technology. Technology nodes proposed were 90,65,45 nm nodes in phase I, 28 nm nodes in phase II with the option of establishing 22 nm node in phase III. The second of the 2 consortia was Hindustan Semiconductor Manufacturing Consortium(HSMC) with ST Microelectronics and Silterra (Malaysia) with proposed outlay of Rs 25,250 crores for establishing the facility for 40,000 wafer starts per month of 300 nm size using advanced CMOS technology at Prantij, near Gandhinagar, Gujarat. Technology nodes proposed were 90,65, 45 nm nodes in phase I and 45,28 and 22 nm nodes in phase II. Incentives to these 2 consortia included incentives under Modified Special Incentives Packages Scheme (MSIPS) and deduction available for expenditure on R&D under the Income Tax Act. Additionally, sectors under section 35AD of the Income Tax Act allowing deduction for any capex incurred for undertaking any specified business were expanded through an amendment vide Finance Act (No 2) of 2014 with effect from 1-4-2015 to include the business of setting up and operating a semiconductor wafer manufacturing unit as notified by the Board. These fab units were also guaranteed viability gap funding (VGF) in form of interest free loans for a period of 10 years.

Both the consortia despite remarkably generous government incentives failed to honour the commitments outlined in the LOI for reasons generally ascribed from hurdles in achieving financial closure to inadequate technology support from their technology partners eventually leading to cancellation of both LOI.

In the backdrop of what happened to the efforts of 2013, this Notification dated 21-12-21 offering an invitation to set up silicon CMOS based semiconductor fab for logic / memory /digital, analog and mixed signal ICs/SOC with node size 65/45/28 nm and wafer size of 300 nm and installed capacity of 40,000 wafer starts per month did offer relatively modest incentives - fiscal support from 30 to 50% of project cost and a promise to consider the cases for benefits under the electronic manufacturing cluster scheme (EMC) for development of infrastructure and common facility center. An additional limb of incentive included the clause for purchase preference in procurement of electronic products by the government under Public Procurement (Preference to Make in India) Scheme, 2017.

Selection of a consortia to put up a semiconductor wafer fab manufacturing facility in terms of notification of December 2021 is admittedly a breakthrough moment for India's industrial sector as much of what an aspirational nation seeking self-sufficiency in connectivity, automotives, biomedical application, precision agriculture, e-governance and high-quality jobs and in ensuring strategic and geopolitical balance hinges on success of this single initiative.


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